hi all,
I've ported the freertos demo for HCS12 banked mode to the demo board DEMO9S12XEP100.
The code crashes at the instruction
__asm( "rti" );
inside function xBankedStartScheduler().

I found a funny thing that is:
"rti" instruction is declared to behave as:

(M(SP)) ⇒ CCR; (SP) + $0001 ⇒ SP
(M(SP) : M(SP+1)) ⇒ B : A; (SP) + $0002 ⇒ SP
(M(SP) : M(SP+1)) ⇒ XH : XL; (SP) + $0004 ⇒ SP
(M(SP) : M(SP+1)) ⇒ PCH : PCL; (SP) + $0002 ⇒ SP
(M(SP) : M(SP+1)) ⇒ YH : YL; (SP) + $0004 ⇒ SP

the Freertos function pxPortInitialiseStack() saves info in stack as specified above BUT once I execute the "rti"I I found that register values are wrong and application crashes.
I found that "rti" increments SP by 1 (SP+1 ) BEFORE doing what is declared !
I modified the pxPortInitialiseStack() in order to add a dummy byte in stack and everithing works !.
Find below the modified code for pxPortInitialiseStack():

portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/*
Place a few bytes of known values on the bottom of the stack.
This can be uncommented to provide useful stack markers when debugging.

*pxTopOfStack = ( portSTACK_TYPE ) 0x11;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x22;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x33;
pxTopOfStack--;
*/



/* Setup the initial stack of the task. The stack is set exactly as
expected by the portRESTORE_CONTEXT() macro. In this case the stack as
expected by the HCS12 RTI instruction. */


/* The address of the task function is placed in the stack byte at a time. */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 1 );
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 0 );
pxTopOfStack--;

/* Next are all the registers that form part of the task context. */

/* Y register */
*pxTopOfStack = ( portSTACK_TYPE ) 0xff;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xee;
pxTopOfStack--;

/* X register */
*pxTopOfStack = ( portSTACK_TYPE ) 0xdd;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0xcc;
pxTopOfStack--;

/* A register contains parameter high byte. */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 0 );
pxTopOfStack--;

/* B register contains parameter low byte. */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 1 );
pxTopOfStack--;

/* CCR: Note that when the task starts interrupts will be enabled since
"I" bit of CCR is cleared */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
pxTopOfStack--;

/* WARNING: Mantovani: Added dummy byte cause RTI assembler instruction seems to be buged !!!! */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
pxTopOfStack--;

#ifdef BANKED_MODEL
/* The page of the task. */
*pxTopOfStack = ( portSTACK_TYPE ) ( ( int ) pxCode );
pxTopOfStack--;
#endif

/* Finally the critical nesting depth is initialised with 0 (not within
a critical section). */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;

return pxTopOfStack;
}

It doesn't seem a memory alignement issue rather that an "rti" hw implementation bug.
Is it possible or I'm doing something wrong ?

All suggestions are welcome.
Thanks
Andrea

sorry,
found solution on forum:
The HCS12X has 2bytes CCR register and "rti" instruction behave like this:

(M(SP) : M(SP+1)) ⇒ CCRH : CCRL; (SP) + $0002 ⇒ SP
(M(SP) : M(SP+1)) ⇒ B : A; (SP) + $0002 ⇒ SP
(M(SP) : M(SP+1)) ⇒ XH : XL; (SP) + $0004 ⇒ SP
(M(SP) : M(SP+1)) ⇒ PCH : PCL; (SP) – $0002 ⇒ SP
(M(SP) : M(SP+1)) ⇒ YH : YL; (SP) + $0004 ⇒ SP

Will the RTOSDemo be updated for freescale CPU12X ?
Thanks
Andrea

Maybe one day - but I can say for sure it won't be any time soon - sorry.

If you update it, or find working code, you would be good enough to add it to the FreeRTOS Interactive site? http://interactive.freertos.org

Regards.

I found that porting for HCS12X was already uploaded.
I didn't find it before.
Thanks a lot.