Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem

Saving the RTOS Task Context
[RTOS Implementation Building Blocks]

Each real time task has its own stack memory area so the context can be saved by simply pushing processor registers onto the task stack. Saving the AVR context is one place where assembly code is unavoidable.

portSAVE_CONTEXT() is implemented as a macro, the source code for which is given below:

#define portSAVE_CONTEXT() \ asm volatile ( \ "push r0 \n\t" \ (1) "in r0, __SREG__ \n\t" \ (2) "cli \n\t" \ (3) "push r0 \n\t" \ (4) "push r1 \n\t" \ (5) "clr r1 \n\t" \ (6) "push r2 \n\t" \ (7) "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \

: : :

"push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxCurrentTCB \n\t" \ (8) "lds r27, pxCurrentTCB + 1 \n\t" \ (9) "in r0, __SP_L__ \n\t" \ (10) "st x+, r0 \n\t" \ (11) "in r0, __SP_H__ \n\t" \ (12) "st x+, r0 \n\t" \ (13) );

Referring to the source code above:

  • Processor register R0 is saved first as it is used when the status register is saved, and must be saved with its original value.
  • The status register is moved into R0 (2) so it can be saved onto the stack (4).
  • Processor interrupts are disabled (3). If portSAVE_CONTEXT() was only called from within an ISR there would be no need to explicitly disable interrupts as the AVR will have already done so. As the portSAVE_CONTEXT() macro is also used outside of interrupt service routines (when a task suspends itself) interrupts must be explicitly cleared as early as possible.
  • The code generated by the compiler from the ISR C source code assumes R1 is set to zero. The original value of R1 is saved (5) before R1 is cleared (6).
  • Between (7) and (8) all remaining processor registers are saved in numerical order.
  • The stack of the task being suspended now contains a copy of the tasks execution context. The kernel stores the tasks stack pointer so the context can be retrieved and restored when the task is resumed. The X processor register is loaded with the address to which the stack pointer is to be saved (8 and 9).
  • The stack pointer is saved, first the low byte (10 and 11), then the high nibble (12 and 13).

Next: RTOS Implementation - Restoring The Context

[ Back to the top ]    [ About FreeRTOS ]    [ Privacy ]    [ Sitemap ]    [ ]

Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.

Latest News

NXP tweet showing LPC5500 (ARMv8-M Cortex-M33) running FreeRTOS.

Meet Richard Barry and learn about running FreeRTOS on RISC-V at FOSDEM 2019

Version 10.1.1 of the FreeRTOS kernel is available for immediate download. MIT licensed.

View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS.


FreeRTOS and other embedded software careers at AWS.

FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Espressif ESP32

IAR Partner

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers


STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

OpenRTOS and SafeRTOS

Xilinx Microblaze and Zynq partner