FreeRTOS Support Archive
The FreeRTOS support forum is used to obtain active support directly from Real
Time Engineers Ltd. In return for using our top quality software and services for
free, we request you play fair and do your bit to help others too! Sign up
to receive notifications of new support topics then help where you can.
This is a read only archive of threads posted to the FreeRTOS support forum.
The archive is updated every week, so will not always contain the very latest posts.
Use these archive pages to search previous posts. Use the Live FreeRTOS Forum
link to reply to a post, or start a new support thread.
[FreeRTOS Home] [Live FreeRTOS Forum] [FAQ] [Archive Top] [July 2014 Threads]
Hi guys,
I'm going to develop an application running under Cortex-M4F processor (STM32F4xx) and FreeRTOS with - most likely - NO MPU support.
My question is the following:
The application tasks that are created using FreeRTOS runs in Cortex-M4 privileged mode so they can access NVIC registers or not?
The application will run a time-critical ISR that will have a priority greater than configMAXSYSCALLINTERRUPTPRIORITY so it's not maskable by kernel.
An application task is in charge to enable/disable/mask this ISR and my wish is to use NVICEnableIRQ - NVIC_DisableIRQ to manage these operations. To do so it's fundamental that software task run in privileged mode (nPRIV bit of CONTROL core register = 0) because in un-privileged mode task cannot access NVIC registers.
Thanks in advance for your support.
Most FreeRTOS applications run without the MPU so tasks run will full privilege. You won't have a problem.
Ok. Glad to know that things works in this way.
Thanks a lot for your answer Mr Dave =)
Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.