Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem


Loading

Critical section used from Interrupts

Posted by dynamiccontrast on January 10, 2011
Hi,

I'm working on a project that uses Cortex-M3 microcontroller and FreeRTOS. Recently, I found a bug that causes a crash here:

/* *** NOTE ***********************************************************
If you find your application is crashing here then likely causes are:
1) Stack overflow -
see http://www.freertos.org/Stacks-and-stack-overflow-checking.html
2) Incorrect interrupt priority assignment, especially on Cortex M3
parts where numerically high priority values denote low actual
interrupt priories, which can seem counter intuitive. See
configMAX_SYSCALL_INTERRUPT_PRIORITY on http://www.freertos.org/a00110.html
3) Calling an API function from within a critical section or when
the scheduler is suspended.
4) Using a queue or semaphore before it has been initialised or
before the scheduler has been started (are interrupts firing
before vTaskStartScheduler() has been called?).
See http://www.freertos.org/FAQHelp.html for more tips.
**********************************************************************/

for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext )

I called taskENTER_CRITICAL and taskEXIT_CRITICAL from interrupt handler (irq on highest priority). Is this a general rule, that critical section could not be used from interrupt handlers, or this is true only in Cortex-M3 architecture?
It wasn't my intention to use critical sections in interrupts, ofcourse, but I wonder why masking interrupts in IRQ handlers could cause a crash.

Best regards,
dynamiccontrast

RE: Critical section used from Interrupts

Posted by Richard on January 10, 2011
“ Recently, I found a bug that causes a crash here”


I don't think you have described the bug in your post. If there is a bug then I would like to know!

“Is this a general rule, that critical section could not be used from interrupt handlers, or this is true only in Cortex-M3 architecture?”


It is an absolute rule for all architectures. The rule extends further than just critical sections "no API function that does not end in 'FromISR' should be called from an ISR". See point 3 on the following page: www.freertos.org/FAQHelp.html

As it happens, the CM3 port has an interrupt safe alternative. Look in queue.c to see how the macros portSET_INTERRUPT_MASK_FROM_ISR() and portCLEAR_INTERRUPT_MASK_FROM_ISR() are used.

Regards.


[ Back to the top ]    [ About FreeRTOS ]    [ Privacy ]    [ Sitemap ]    [ ]


Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.

Latest News

NXP tweet showing LPC5500 (ARMv8-M Cortex-M33) running FreeRTOS.

Meet Richard Barry and learn about running FreeRTOS on RISC-V at FOSDEM 2019

Version 10.1.1 of the FreeRTOS kernel is available for immediate download. MIT licensed.

View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS.


Careers

FreeRTOS and other embedded software careers at AWS.



FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Espressif ESP32

IAR Partner

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers

Renesas

STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

OpenRTOS and SafeRTOS

Xilinx Microblaze and Zynq partner